A Replacement of CPLD Design with Discrete Logic Chips

The flat knitting machine is a type of textile machinery widely used in the production of garments such as sweaters, scarves, and hats. This complex system consists of over 130 individual components, with the flat knitting machine head plate being one of the most critical parts. The head plate must manage numerous needles, and to achieve precise control, a CPLD (Complex Programmable Logic Device) is typically used to generate various logic signals that drive solenoids and stepper motors. As a result, CPLDs are commonly integrated into the main board of the head plate to facilitate signal routing and control. Traditionally, the flat head plate is composed of a main board and a daughter board, with the latter connected via a connector to complete the control functions. However, due to mechanical constraints, the motherboard may not have enough space to accommodate the CPLD, which can significantly complicate the layout process for engineers. This limitation often leads to increased design challenges and reduced flexibility in system configuration. To address this issue, this paper presents an alternative solution: replacing the CPLD with discrete logic chips. When space on the motherboard is limited, the majority of the logic functions can be moved to the daughter board, thereby optimizing the layout and improving overall system design. The implementation involves using a SN74AHC138 as the primary chip to generate chip select signals. Each main SN74AHC138 can support up to eight slave SN74AHC138s, allowing for efficient addressing of multiple devices. Additionally, the SN74HC259 is used to generate trigger signals, with its data pins connected to the MCU’s data bus. Each SN74HC259 is paired with a DRV8844 driver, enabling precise control over the motor outputs. Finally, the SN74AHC138 and SN74HC259 chips are placed on the daughter board, while the main SN74AHC138 remains on the motherboard. This arrangement ensures proper signal distribution and simplifies the overall design. As shown in Figure II, this approach allows for the selection of any address combination—C1B1A1CBAS2S1S0—which enables the generation of any required driving signal. This method effectively solves the layout challenges associated with CPLDs in flat knitting machine applications, offering greater flexibility and ease of use for customers.

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