On FPGA Design Method of Industrial Control System (3)

Last time, the blog post briefly analyzed the driving force of using FPGAs for industrial control, and introduced FPGA devices and development tools. As device costs decrease and device performance increases, FPGAs will play a greater role in industrial control. You can even guess boldly. Maybe one day, all kinds of FPGA chips carrying PowerPC, ARM and even DSP+FPU will completely replace the control cores built by various microcontrollers and DSPs, and become the “big Mac” in the core field of industrial control. Well, I said so much, I entered the topic, this time I mainly conducted an overall analysis of the modeling and design methods of the entire control system. At the same time, I hope that my friends can think together, why foreigners can often be innovative and forward-looking. Why do foreigners discuss various "methodologies" on the basis of specific design? I hope that we can first jump out of the specific details, grasp the core of the entire design, ensure the general direction, and then carry out specific implementation.
Traditionally, engineers around the world need to model the capabilities of the system. When the CAD function is not perfect, each module in the actual system needs to be designed separately; this often involves various CAD tools and different software platforms, and even the existing design itself needs to be in multiple different hardware and software environments. Complete development (such as programming, simulation, synthesis, wiring, programming, plate making). With the improvement of CAD tools and the progress of hardware description languages, the gap between functional descriptions and actual hardware implementations in traditional designs is gradually narrowing. System-level modeling languages ​​(such as Handel-C and System-C) and HDL languages ​​(such as VHDL, Verilog) enable the model description and electronic design of the system to be implemented in the same development environment at the same time; Support for major computer engineering aided design platforms. These designs can then be converted into netlists for various hardware platforms using synthesis tools.
This holistic, system-level development and design of electronic systems is ultimately summarized as a “top-down” design approach: first, designers need to abstract their design intent. Modeling; then through repeated iterations, verification, necessary modifications to the design until the specific design of the system is completed. Of course, just completing the design is not enough; at the beginning of the design, you should consider how to build and complete a test system to prove that our design is correct. As the design is gradually completed, the hardware description language has also given a description of the entire complex, specific digital system, and then the test system can be used to verify the completed system according to the original design goals. Testing is done before investing in hardware or actual implementation, improving reliability and avoiding losses due to specific design failures. In terms of the overall modeling of complex electronic systems, system-level modeling languages ​​have the following advantages:
1) It is possible to consider both the engineering system model (function/behavior description) and the specific electronic hardware design in the same unique design environment, and is widely supported by a series of CAD platforms;
2) has the ability to handle all levels of abstraction; the entire model can be simulated at various stages of the electronic controller design, and a targeted system-on-chip implementation is performed;
3) Fast system implementation and relatively short time to market;
4) It is easy to implement hardware for artificial intelligence;
5) Generate generic, reusable models or design modules based on reusable modern design principles.
The simulation results are extremely valuable for the behavioral verification of the model; however, in many cases, especially before deciding to invest and produce an ASIC, hardware verification of the controller is still required to provide the required information. The cheapest and fastest way to design and validate an optimized digital controller is to build a prototype (prototype) containing reprogrammable devices, such as an FPGA. This reduces the time to correct any design issues and ensures that the design is free of errors before the permanent ASIC implementation. The prototype can also be used to perform hardware testing on other components of the system. This prototype-based development environment also makes it easy to implement a modern, hardware-in-the-loop test (HIL) approach. The HIL uses a hardware-based loop-based simulation system that feeds the output of the circuit under test back to the input and produces a signal that needs to be fed back to the circuit under test as an input, allowing for efficient testing of the hardware circuitry. These signals are similar to the outputs of subsystems that are replaced by HIL simulation systems and run in real time. For example, Celoxica's DK4 design suite allows the functional modeling of an electronic system using Handel-C (a high-level language similar to C). Handel-C compiles the design according to specific hardware goals and produces the output of the Electronic Design Interchange Format (EDIF). During the design process, we will find that Synplify Pro outputs the EDIF netlist in ISE format after the integration process is completed. Xilinx's layout and routing tools convert the EDIF format to specific circuit routing, allowing hardware development boards containing FPGAs to be quickly implemented in hardware. The compiler can also generate code in HDL format for integration with other hardware components in the SoC design. The application programming interface (API) of the platform abstraction layer provides portability that eliminates the need to modify the design on different PLD/FPGA/ASIC hardware target platforms. Therefore, Handel-C can be used as a programming tool and then used in Xilinx's integrated development environment for real-time FPGA analysis. The overall modeling method combines HDL language, FPGA device and effective simulation and evaluation methods to show great advantages in the design of various new and complex classic/neural/fuzzy industrial controllers. The following blog post will cover the FPGA-based industrial controller design principles.

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