Intel wins tri-gate transistor race short-range victory

Intel launched a 22-nm process on Wednesday (May 4th), which is basically in line with previous expectations, but there are still surprises. Intel's 22nm process is based on its three-dimensional transistor design, the tri-gate structure. Intel pioneered the announcement of tri-gate transistors in 2002. This transistor will form the basis of its 22 nm node.

Intel also showed a processor code-named Ivy Bridge, the world's first 22-nanometer microprocessor. Based on Ivy Bridge's Core Series processors, it will be the first mass-produced tri-gate transistor chip. Ivy Bridge will prepare for mass production before the end of this year.

However, Intel did not announce a 22-nanometer mobile processor, and this processor may help it to resist the competitive threat from the ARM camp.

Intel's 22nm process will also be based on its third-generation HKMG, and will use copper interconnects, low-k, strained silicon and other technologies. In addition, similar to 32nm, the 22nm process will continue to use 193nm immersion lithography.

Intel did not disclose any details about the low-k interconnect technology. Intel insists that it will not use silicon-on-insulator (SOI) technology. According to Intel, SOI wafers will cause the overall process cost to increase by about 10%.

Multi-gate transistor race 3-D tri-gate transistor realizes transistor breakthrough. Traditional "flat" 2-D planar gates are replaced with ultra-thin, 3-D silicon fins erected vertically from a silicon substrate. Current control is achieved by mounting a gate on each of the three sides of the fin (one gate on each side and top) rather than having only one gate on top, as is the case with 2-D planar transistors. More control allows the transistor to pass as much current as possible in the "on" state (high performance), while in the "off" state it allows the current to be as close to zero (low power consumption) as possible, while still allowing Rapid switching between states (this is also to achieve high performance).

Just as skyscrapers evolve to the sky to allow city planners to optimize the available space, Intel's 3-D tri-gate transistor architecture provides a way to manage transistor density. Because these fins are themselves vertical, the transistors can also be more closely packed - this is the key to the technical and economic benefits pursued by Moore's Law. In the future, designers can also increase the height of fins to achieve higher performance and energy efficiency.

"In the years of exploration, we have seen the limits of shrinking the size of transistors," Moore pointed out: "This change in the basic structural level today is a real breakthrough, it can make Moore's Law and innovation. The pace of history continues to be dynamic."

Other leading chip manufacturers that are developing multi-gate transistor structures include IBM's fab club, TSMC and others. Tri-gate transistor technology is called FinFET outside of Intel. TSMC plans to introduce its first FinFET at the 14nm node.

According to Mark Bohr, Intel senior researcher and director of process architecture and integration, in any case, Intel will at least "lead three years" in the multi-gate transistor race. He said that tri-gate technology can do 14 nanometer nodes, but he did not talk about the next node after 22 nanometers.

Unprecedented Energy Savings and Performance Improvements Intel's 3-D Tri-Gate Transistors enable the chip to operate at lower voltages and further reduce leakage, providing unprecedented performance compared to the most advanced transistors available. High performance and energy efficiency. These capabilities allow chip designers the flexibility to use low-power or high-performance transistors depending on the needs of the application.

Compared to previous 32-nanometer planar transistors, the 22-nanometer 3-D tri-gate transistor offers a 37% improvement in performance at low voltage. This amazing improvement means that they will be ideal for small handheld devices that require the transistor to operate "on-off" with less power. The new transistor consumes less than half the power to achieve the same performance as a 2-D planar transistor in a 32-nanometer chip.

Intel said that at low voltage conditions, the 22nm tri-gate transistor performance can be up to 37% higher than the Intel 32nm planar transistor. Intel pointed out that this means that it is suitable for small handheld devices, so that these devices consume less energy during the "switch" process. In other words, with the same performance, the new transistor consumes 50% less power than the 2D planar transistor on the 32nm chip.

Bohr said that in order to achieve the 22-nanometer node, Intel must perform several double-drawing steps. But overall, the company will use standard semiconductor manufacturing equipment, which will only lead to a 2-3% increase in cost.

Intel said that its 22nm process codenamed 1270, has begun production. The first batch of wafers will come from the D1D chip factory in Oregon, and production of the F32 plant in Arizona will begin later this year later in the year.

Last year, Intel agreed to serve as an OEM service provider for FPGA startup Achronix Semiconductor, which surprised the industry. According to reports, Intel apparently reached a similar agreement with Tabula, another newly-editable logic manufacturer. Intel declined to comment on Tabula's report, calling it a rumor.

Analysts said it will exacerbate x86 and ARM competition Monday (May 2), and Piper Jaffray analysts believe that Intel is seeking Apple's foundry business. Related reading: Apple-Samsung relations deteriorate, Intel wants to benefit analysts for Intel's announcement of the 22-nanometer triple-gate technology. Doug Freedman of Gleacher & Co. Analyst Doug Freedman said: "Performance data is impressive."

"Compared with planar technology, the new technology only leads to a 2-3% increase in the cost of finished wafers," he said. "The tri-gates can lead to lower leakage currents (fully depleted transistors) or lower threshold voltages. In low-power/low-voltage operation, this is more advantageous for performance because the shutdown process is the key to overall power consumption.” Tri-Gate technology generates silicon 'fin' on which stereoscopic transistor channels and gates are formed, more than planar Technology has a better scaling factor, so the die size benefits may be enough to offset the additional costs it brings.

Intel plans to use the first 22-nm chip for desktop computers and servers, but Freedman believes it should be the first to consider another area. He said: "Why not consider the mobile field first?"

Freedman said: "The x86 products will be the first to adopt the three-dimensional transistor gate technology, which may help offset the architectural limitations of x86 and thus better compete with ARM in optimizing low-power performance. We believe this will not change the current situation, but It will definitely increase the competition between x86 and ARM."

"Intel did not go all out in the ultra-mobile and tablet markets and placed these products behind servers and notebook/desktop products," he said. "So, the impact of this technology on the mobile phone and tablet market is the earliest It will only be seen by the end of 2012. The mobile phone market will need more than nine months to validate designs and introduce products to the market. We believe that Intel will not provide 22nm mobile phone chips to OEMs until early 2012."

Absence of mobile processor "In the past few days, people have speculated that Intel will introduce a new type of mobile processor, immediately destroying the ARM business model and Nvidia's Tegra business. There is no such news announced, especially a few weeks ago Intel's mobile / tablet After the sudden departure of the smart phone business executive, "Raymond James & Associates Inc. Hans Mosesmann, the analyst, wrote in the report.

Intel is moving at full speed in the mobile space. The company recently announced a processor code-named "Oak Trail," which uses a 45-nm process for mobile devices. Stephen Smith, Intel’s new vice president of the Internet and Tablet Division, said that OEMs will soon announce products based on the processor.

Following the Oak Trail, Intel is developing two 32nm-based mobile processors, including Medfield and Clover Trail. Smith told EE Times that Medfield is for smart phones. He said that Clover Trail will allow Intel to be at the forefront of the mobile space. However, he did not disclose any products based on 22nm.

In any case, Mosesmann said, "The company believes (tri-gate transistors) will allow Moore's Law to continue to work from Intel's 22nm node. This means that the power and cost per transistor are declining, and performance continues to increase."

"Intel announced the 45-nanometer gate last high-k metal gate transistor about four years ago. The new move is expected. Intel is leading the semiconductor industry in terms of manufacturing processes," he said. "Intel is not alone in 3D transistors: GlobalFoundries is also developing this process; STMicroelectronics believes that it is less than ideal for low power consumption; Samsung is evaluating the stereo and planar approach. We believe that Intel may be ahead of the competition for two years or so."